The present inventors have previously proposed a variable capacitance device comprising a plurality of variable capacitors serially connected in a lamination direction of internal electrodes (Patent Literature 1). An art disclosed in Patent Literature 1 provides a configuration being such that internal electrodes constituting each of the variable capacitors are laminated via a dielectric layer, whereby the number of the internal electrodes per layer can be reduced and a degree of flexibility in designing an electrode, a capacitance value, and the like can be made higher.
On the other hand, the present inventors have proposed another art being such that, in a capacitance element formed by laminating a plurality of internal electrodes, an internal electrode unrelated to a capacitance element body forming electrostatic capacitance is provided as a stress control unit, whereby electrical characteristics are improved with residual stress generated at the time of baking. (Patent Literature 2). According to the art disclosed in Patent Literature 2, the stress control units formed by laminating the internal electrodes are arranged at upper and lower sides of the capacitance element body, whereby internal stress resulting from shrinkage of a dielectric layer at the time of baking of the capacitance element can be generated in the dielectric layer of the capacitance element body. As a result, the dielectric layer of the capacitance element body can have a higher relative dielectric constant.